Efficient Heater Cores for Xilinx Virtex FPGAs

Set your FPGA on fire!

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Overview

For studying thermal properties of FPGAs (e.g., for building thermal models or for investigating fault-tolerance methods for mitigating temperature induced soft-errors) it is important to have hardware cores that can generate large amounts of heat. In our publication "M. Happe, H. Hangmann, A. Agne, and C. Plessl. Eight ways to put your FPGA on fire ā€“ a systematic study of heat generators. In Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), pages 1ā€“8. IEEE Computer Society, Dec. 2012." we have presented a study that evaluated several methods for intentionally generating heat on FPGAs. This projects make the best performing heat generator from this study (oscillators implemented in LUTs) available as open-source hardware, that is, a PCore that can be embedded in Xilinx EDK designs. The amount of heat can be regulated in 32 levels.

Using the Heater Core

Step 1 ā€“ Adding the Heat Core to your XPS project

  1. Download the Heat Core and the TimeBase.
  2. Copy the Heat Core and the Time PCores to your project by copying the "heat_core" and the "simple_timebase" directories to the "pcores" directory of your project.

  3. Open your XPS project and rescan the user repositories.

  4. Add the PCores by right-clicking and adding them.

  5. Choose the number of LUT-Oscillators, which create the heat, by changing the value of C_NUM_LUTS.

  6. Prevent trimming of the heat core by opening the Implementation Options File and adding -u to the mapper options.

  7. Ignore timing errors, by unchecking "Treat timing closure failure as an error" in your project settings. This step is required because the Heat Core will produce timing errors to work properly.

Step 2 - Using the Heat Core in your C code

  1. Use the example project heat_control, which can be found in the GitHub repository. Alternatively, you need to add the following C header files to your project: heat_core.h, time_base.h, and system_monitor.h.
  2. Now you can use the HeatCore with the following functions:
    • int get_active_heater( unsigned int* heat_core ) - returns the number of active heat blocks (1 - 32)
    • void set_active_heater( unsigned int* heat_core, int active ) - sets the number of active heat blocks (1 - 32)
    • void enable( unsigned int* heat_core ) - enables the HeatCore
    • void disable( unsigned int* heat_core ) - disables the HeatCore
    • void increase( unsigned int* heat_core) - increases the Heat Core's intensity level
    • void decrease( unsigned int* heat_core) - decreases the Heat Core's intensity level
    • int enabled( unsigned int* heat_core ) - returns '1' if heater is enabled
    • unsigned int sysmon_get_mcelsius() - returns the temperature of your FPGA in millicelsius
    • unsigned int sysmon_get_vcc() - returns the voltage of your FPGA
    • void wait_for_ms(int duration) - waits for duration ms

    3. Step 3 - Set placement constraints

    Open the UCF file of your project and constrain the placement of your Heat Cores, e.g., with the following constraints:
    INST "heat_core_1" AREA_GROUP = "heat_cores";
    INST "heat_core_2" AREA_GROUP = "heat_cores";
    AREA_GROUP "heat_cores" RANGE = SLICEX0Y50:SLICE_X61Y111;

Acknowledgement

The research leading to these results has received funding from the European Union 7th Framework Programme under grant agreement nā—¦ 257906. For more details please refer to the EPiCS website.

License

Copyright (c) 2013 Hendrik Hangmann, University of Paderborn

Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:

  • The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
  • THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.